NVIDIA/Mellanox MMS4A00-XM (980-9IAH1-00XM00) Compatible 1.6T 2xDR4/DR8 OSFP224 IHS/Closed Finned Top PAM4 Broadcom 3nm DSP (Sian3 | BCM83628) 1310nm 500m SMF DOM Dual MPO-12/APC InfiniBand XDR Silicon Photonics Transceiver Module for Quantum-X800 Air-Cooled Switches

NADDOD 1.6T transceiver has been successfully deployed in real XDR AI clusters, maintaining continuous, stable operation under full-port, full-load conditions. Tested with the NVIDIA Quantum-X800 (Q3400-RA) switch and ConnectX-8 network card in typical high-bandwidth, continuous XDR workloads, this transceiver achieves an ultra-low BER of 5E-14 at a mere 25W power consumption. This fully validates its reliability in high-density, long-term full-load XDR cluster deployments.

As XDR networks scale in port density and bandwidth, power consumption, cooling performance, and link stability become critical challenges. NADDOD 1.6T transceiver features a collaborative design that combines Broadcom 3nm DSP (BCM83628) with in-house silicon photonics, and is already operating stably in real XDR clusters. Compared with common 5nm DSP solutions, this design delivers lower power consumption, more stable links, and better heat dissipation in high-density scenarios—enabling long-term full-load operation of large-scale GPU clusters, while cutting port failure rates and reducing operational costs.

In large-scale AI clusters, XDR networking based on this 1.6T transceiver delivers measurable gains over NDR architectures. Real operational data from a 512-node cluster shows a reduction of ~ 7 racks (20 kW × 42U), a total power reduction of 130.4 kW (≈ 16–26 GPUs’ power), and a total cost reduction of 41%. By reducing rack count, simplifying cabling, and improving space utilization, this solution increases compute density while enabling flexible future cluster expansion.

NADDOD 1.6T transceiver has been delivered at scale and validated on HGX B300 servers, fully compatible with NVIDIA DGX B300, GB300, and OEM HGX B200 high-density GPU servers. Supported by a mature production system and stable chip supply, it serves as a core solution for high-speed interconnect between servers and switches under the XDR architecture, and is already operating reliably in large-scale AI clusters, enabling smooth transition from validation to large-scale deployment.